Shang-Chun (Luke) Lu

AI Research Faculty @ NCKU School of Computing and @ AI Startups

Connect with me at: X US: (872) 256-8653 TW: +886 6-2757575 # 80981

My research focuses on Reasoning models, Agentic AI, Large Language Models (LLMs), Vision-Language Models (VLMs), and World Foundation Models for robotics.

Expertise in training advanced neural nets at companies including Intel, SanDisk, and more recently, AI startups.

I received my PhD in ECE from UIUC (2019), co-advised at MIT EECS 2017-2019, and a bachelor's degree from NTU Physics and a master's from NTU EE. Over 10 publications and 7 conference presentations.

Work Experience

• AI Research Faculty, Miin Wu School of Computing, NCKU (Feb 2025 – present): Launching AI R&D initiatives, including post-training Thinking LLMs/VLMs with advanced reasoning, vision RAG agents for medical use, finetuning Robotics models, and planning AI infrastructure.
• VLM Advisor/Lead Architect, Rayleigh Vision Intelligence Co. Ltd. (Dec 2024 – present): Architecting VLM solutions and coordinating with infra/manufacturing teams to support Micro LED customers.
• 3D Gen AI Consultant, Stealth AI Startup from Stanford University (July 2024 – present): Advising on generalized agents for 3D generative AI applications.
• Head of Gen AI, Rengiantek AI (Dec 2023 – Dec 2024): Led projects building RAG Agents with LangGraph, finetuning LLMs for academic peer reviews, and developing fall detection visual AI agents using Nvidia tools for eldercare in large facilities.
• Staff R&D Engineer, Deep Learning, SanDisk (May 2020 – Nov 2023): Led DL projects like training Mask-RCNN/Transformers for wafer inspection (reducing time by 90%+), SAM auto-labelers, LLM fine-tuning for semiconductor data, and VAEs for pattern generation.
• Personal AI Project (2021 – 2022): Used Mask-RCNN, CNN, and GenAI to create digital arts.
• Transistor Reliability R&D Engineer / Data Scientist, Intel Corp. (May 2019 – May 2020): Analyzed transistor reliability using ML models (e.g., regression, random forest) to automate data processing and support process development.
• Visiting Student Scientist, MIT (Nov 2017 – April 2019): Designed post-CMOS transistors and explored materials for quantum computing using DFT + ML and NEGF for electron transport simulations.

Selected Conferences

1. CoVaPh: A Vision-Language Multi-Agent System for Tool-Augmented Pharmacogenetic Reasoning and Personalized Guidance, S.-C. Lu et al., submitted to AAAI-26.
2. Atomistic Design of Multilayer Black Phosphorus Vertical Tunnel FETs based on Coupled DFT and NEGF method, S.-C. Lu et al., 20th IWCN, Evanston, IL, May 20-24, 2019.
3. Design Guidelines and Limitations of Multilayer Two-dimensional Vertical Tunneling FETs for Ultra Low Power Logic Applications, S.-C. Lu et al., SISPAD 2018, Austin, TX, Sept. 24-26, 2018.
4. Modeling of black phosphorus vertical TFETs without chemical doping for drain, S.-C. Lu et al., SISPAD 2017, Kamakura, Japan, Sept. 7-9, 2017.

Selected Journal Publications

1. Superior Performance of 5 nm Gate Length GaN Nanowire nFET for Digital Logic Applications, Y. Chu, S.-C. Lu, et al., IEEE Electron Device Letters, vol. 40, no. 6, pp. 874-877, 2019.
2. Novel Vertical Hetero- and Homo-junction Designs for Tunnel FETs based on 2D Crystals, S.-C. Lu, M. Mohamed, W. Zhu, 2D Materials 3, 011010, 2016.
3. Electronic structures of defects and magnetic impurities in MoS2 monolayers, S.-C. Lu, J.-P. Leburton, Nanoscale Research Letters, 9:676, 2014.
4. First-principles study of Ge dangling bonds with different oxygen backbonds at Ge/GeO2 interface, H.-C. Chang, S.-C. Lu, T.-P. Chou, et al., J. Appl. Phys. 111, 076105, 2012.
5. Surface Passivation of Cu(In,Ga)Se2 Using Atomic Layer Deposited Al2O3, W.-W. Hsu, J. Y. Chen, T.-H. Cheng, et al., Appl. Phys. Lett. 100, 023508, 2012.